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Design Engineer

Design Engineer
Statewide, Karnataka

Job Description

As part of the MCU32 Front-End Design Group, the successful candidate will be responsible for Design / Integration of new 32-bit micro-controllers.

 

The candidate will interact regularly with cross-site teams to achieve the following goals :

  • Perform System Verilog RTL design to integrate modules at SoC level to build 32-bit Micro-controller products
  • Design modules for 32-bit micro-controllers products
  • Simulate at the module level and SoC level to guarantee design objective specification functionality and timing
  • Generate and maintain Micro architecture specification (MAS) at module and SoC level and other design flow documentation
  • Run and debug gate level simulations at SoC level
  • Develop functional test patterns to validate silicon on tester
  • Debug silicon products in support of Release to Production

Job Requirements

  • 2-5 years of experience in ASIC/ SoC / FPGA Design
  • Must be able to write reusable System Verilog RTL codes, follow design and DFT guidelines
  • Able to debug Gate Level Simulation failures
  • Able to write C and Assembly code based tests to verify SoC functionality
  • Able to write good documentation for micro-architecture specification (MAS) at the SoC and module level
  • Able to write SoC level verification test plans
  • Able to provide clocks and constraints for synthesis and static timing analysis
  • Able to run formal verification/equivalence checking
  • Have scripting and automation skills  - Linux shell scripting, Perl, Tcl, Makefile and revision management
  • Familiarity with system verilog for verification, VMM, assertions, cover points is a plus
  • Strong analytical, and problem solving skills, as well as hands-on SoC debugging / bring up skills
  • Self-motivated, able to work with minimum support, excellent communication skills and an excellent team player
  • Masters in Electronics / VLSI is a plus.

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