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Intern MPU32 Design

Intern MPU32 Design
Rousset, Provence-Alpes-Côte-d'Azur

Job Description

MPU32 Design - Intern

Subject : Complex architecture study for ARM Based Processor System-On-Chip

  • First Phase

    • Setup architecture simulations based on existing SoC

      • Digital IP blocks integration : Video Encoder/Decoder, GPU

      • RTL simulation

      • Verilog / SystemVerilog modelisation

    • Configuration and optimization of the existing  « Network on chip Interconnect »

      • Protocols understanding : ARM AMBA AXI/AHB/APB

      • Protocols understanding :  DDRx/Ethernet/USB/SDCard

    • Performances analysis

  • Second Phase

    • New SoC « Network on chip Interconnect » integration in replacement of the existing one

      • Configuration and optimization

    • Simulations setup :

      • Handling large number of simulation cases

    • Performance analysis : synthesis of all simulation results

  • Third Phase

    • Differential analysis

    • Conclusion

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Job Requirements

  • Required knowledge :

    • Languages knowledge :  Verilog / SystemVerilog / C

    • RTL Simulation knowledge

  • Skills obtained at the end of internship

    • Complex SoC architectures simulation based on “Network on chip” and ARM Processors

    • Deep knowledge in ARM Processor based architectures

    • Deep knowledge on « Network on Chip Interconnect »

 

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