Technical Staff Engineer – Digital Design (Networking)

Nationwide, IN

Req ID: I165-22

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Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

  • Looking for highly skilled Staff Engineer – Digital Designer to contribute to high-speed RTL design, design verification, synthesis, STA, and DFT for Ethernet PHY (Physical Layer) products. This position, as part of the global design team at Microchip Technology Inc., is for the Ethernet & USB Networking group located in Hyderabad, AP India.

Job Requirements

  • 12 years or more experience in high-speed digital design, preferably with data communication expertise at the PCS layer.
  • Ability to act as a digital design leader and mentor junior level engineers.
  • Experience in Ethernet PHY design, including AFE (Analog Front-End) to PCS (Physical Coding Sub-layer) interaction, DSP (Digital Signal Processing), and PCS state machine design is preferred.
  • Knowledge of digital logic design flows including RTL simulation, logic synthesis, timing constraints, timing closure, STA, gate level simulation, and equivalence checking.
  • Strength in STA for working with 28nm designs (PT, PT-Si, multi-mode, PVT/RC corners, OCV, timing models, timing constraints) required. 
  • Experience in RTL design with System Verilog.
  • Experience in ASIC test methodology such as Stuck-At/At-Speed scan insertion and test pattern generation.
  • Knowledge of a scripting language such as C, TCL, Perl, Awk, UNIX shell.
  • Able to do hands-on lab evaluation of Test/Production Chips.  Ability to use of digital multi-meters, oscilloscopes, and logic analyzers.
  • Experience with Cadence and Synopsys CAD tools.
  • Ability to solve complex problems including multiple clock domain crossings and mixed-signal control loops.
  • Ability to work as part of Digital, Analog, and DSP design team and as part of global multi-sited Development team.


  • To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The candidate must possess good verbal and written skills and be able to participate in group meetings, provide project updates, and generate functional and technical documents. The candidate should also be proactive and be willing to learn and adapt quickly in a dynamic and cross-functional environment. The requirements listed above are representative of the knowledge, skill and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions of the job.
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