Senior Engineer I - Verification

Bangalore, IN

Req ID: I472-22

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Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

The Mixed Signal & Linear Business Unit (MSLD) provides a broad spectrum of analog and mixed-signal products and solutions that enable customers to interact with real world signals through digital systems. MSLD team is actively looking for an Experience Digital Verification Engineer to Verify high performance data converters and other mixed signal products which use data converters. This is a hands-on technical contributor role that will allow the right candidate to develop their engineering skills and participate in varied, interesting and challenging development projects. The successful candidate works to achieve operational targets with major impact on the departmental results.

  • Define and develop verification architecture
  • Define and develop verification methodologies
  • Define and develop verification environments
  • Write verification specifications, verification plans, and documentation
  • Generate test bench and automatic regression plans
  • Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs
  • Complete block-level verification and chip level verification
  • Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
  • Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities
  • Mentor Junior Engineers on need basis
  • Present verification plan and verification results to product team.
  • Drive product verification activity to closure with metric driven verification methodology
  • Work with validation team for post silicon debug

Job Requirements

  • Bachelor/Master degree in Electronics or Electrical Engineering minimum
  • 5-7 years of experience in Digital Verification
  • Master's Degree in Electronics or Electrical Engineering or equivalent (preferred)
  • Languages (Must) : Verilog and System Verilog
  • Methodologies (Any one) : OVM, VMM., UVM (UVM Preferred)
  • EDA Tools (One of them is must): Questasim, VCS, NCSim, NCVerilog
  • Good understanding of digital design fundamentals
  • Proficient with Unix environment and common scripting languages
  • Expertise in test plan development
  • Expertise in Functional / Code Coverage activity
  • Experience in IP level verification activities
  • Hands on project experience in coverage/assertion driven verification
  • Hands on project experience in constrained random stimulus and auto checking verification
  • Testbench development in Verilog/SystemVerilog using verification methodology
  • Strong in simulation and debugging skills
  • Knowledge of revision control tools like CVS and GIT
  • Experience in UVM methodology
  • Must have strong written and verbal communication skills with an ability to work with teams spread across geographic locations
  • Self-motivated and capable of working independently or as part of a team. Should know when to ask for help
  • Mixed signal verification & real number modeling (Preferred)
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