Senior Technical Staff Engineer (MSLD)

Chandler, US

Req ID: 475-22

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Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

The Mixed Signal & Linear Business Unit (MSLD) provides a broad spectrum of analog and mixed-signal products and solutions that enable customers to interact with real world signals through digital systems. MSLD team is actively looking for an Experience Digital Engineer to design/architect high performance data converters and other mixed signal products which use data converters. This is a hands-on technical contributor role that will allow the right candidate to develop their engineering skills and participate in varied, interesting and challenging development projects. The successful candidate works to achieve operational targets with major impact on the departmental results.

  • Architecture, design, verification and implementation of digital semiconductor devices including: RTL development,  verification, synthesis, physical layout support, static timing analysis and DFT.
  • Involved in architectural and micro architectural analysis for bus speed/bandwidth, clock latency, ECC on RAM/ROM 
  • Experienced in Lint, CDC, logic synthesis, formal verification and static timing analysis
  • Experience with DSP filter design, Safety and Security feature are considered plus.
  • Familiar with low power methodology and flow
  • Capable of debugging EDA tool issues or design related issues
  • Knowledge in DFT is must
  • Good script language skill using Tcl, Perl and/or Awk
  • Protocol knowledge and experience in serial peripherals SPI/I2C, QSPI, OSPI

Job Requirements

 10 - 12+ years of industry experience
• Experience with coding and design of synthesizable logic using System Verilog
• Experience with DSP Filter design/analysis
• Experience with low power design techniques is an asset
• Familiar with all aspects of the digital ASIC design flow including RTL design and verification
• Strong coding / scripting skills with languages such as C/C++, Python and Perl
• Experience with Synopsys or Cadence tool flows for synthesis, verification or STA is an asset
• Experience with 3rd party IP integration and support
• Experience with one or more of the following communication protocols (PCIe, CXL, DDR, SAS, SATA)
• Experience with micro-processors is an asset
• Experience with UVM verification methodology is an asset
• Experience with Specman/e verification language is an asset
• Excellent problem solving and debugging skills
• Excellent communication (written and verbal), and documentation skills
• Ability to quickly ramp on new projects

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