Req ID: I697-22Apply Now Back to Search
Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.
Design Engineer - Intern – Bangalore, India
The Wireless Solutions Group is looking for a highly motivated, problem solving new college graduate to work in the SoC team as Digital Design Engineer. The primary responsibility is to support product development for our next generation wireless products. The role involves “hands-on” logic design work using System Verilog & working with design verification, implementation teams using an industry leading ASIC design flow to realize the designs.
- Work with the design team in overcoming HDL design challenges, achieving verification goals, and assisting with critical debug activities
- Candidate will perform the integration of subsystems into a MIPS/ARM processor based SOCs
- Perform spec reviews, code reviews, coverage analysis, etc. in support of corporate ISO Quality Systems
- Knowledge of System Verilog and/or VHDL, and experience with simulators and waveform debugging tools
- Digital system-level design and knowledge, including use of standard bus protocols, bus architecture design and chip-level clock and reset architecture
- Knowledge of ASIC Design with keen understanding on Performance/Area/Power trade-offs
- Knowledge of common UNIX scripting languages (Perl, Python, csh, etc.) & C Programming Language
- Superior Written and Verbal Communication skills
- Familiarity in multi-voltage domain flows using UPF/CPF (IEEE-1801) for power intent definition
- Familiarity in ASIC implementation methodology steps like lint, CDC, Synthesis, formal verification, and STA
- Familiarity in MIPS/ARM processor based subsystem
- Master's Student in Electrical/Electronic Engineering or equivalent