Principal Engineer-Architecture

Austin, US

Req ID: 683-22

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Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

The Analog Power and Interface Division (APID) provides solutions for power conversion and system interfacing that complement Microchip’s wide variety of products, such as MCUs, MPUs, and FPGAs. The power conversion portfolio includes a wide range of products including linear regulators, MOSFET and motor drivers, switch-mode controllers, switching regulators, and LED drivers. For higher power density solutions, APID also offers integrated power modules, which combine a regulator, inductor, and input/output caps into a single package. In addition to power conversion, APID produces protection and distribution devices, such as supervisors, load switches, hot-swap controllers, and efuses.

For system interfaces, APID has a growing portfolio of CAN/LIN transceivers, controllers, system basis chips, and system-in-package solutions. Embedded systems interface devices include I/O expanders, IrDA, and USB bridges. APID even has a line of high-voltage parts that drive MEMS devices, haptics interfaces, ultrasound solutions, and telephony systems, such as line circuits and line drivers.

Microchip has an opportunity for an experienced silicon Architect at our office in Austin, TX. As a member of Microchip’s Architecture/Applications team, the successful candidate will work within divisional product teams to define the architecture of new products and intellectual property for power management and interface products.

Job Responsibilities:

•    Collaborate with multiple functional groups within the business unit to define product requirements for power management and interface products.
•    Define innovative peripherals and product features that enable specific application solutions.
•    Develop detailed design objective specifications for products and associated peripherals based on the established requirements.
•    Work closely with design/verification/validation teams to ensure that design objectives are fully met.
•    Establish requirements for acquired/external IP and review associated licensing contracts.
•    Work with other product divisions to maintain synergy and re-usability of IP.

Job Requirements

•    Minimum Bachelor of Science degree in Electrical Engineering or Computer Engineering
•    8.5+ years of relevant experience in the areas of mixed-signal silicon design, or mixed-signal power systems design
•    Must demonstrate initiative and be self-motivated.
•    Independent, but also works well within the team setting.
•    Creative with an attention to detail.
•    Experience in any of the following areas is a plus:
•    SOC or FPGA development
•    Motor control and power conversion modeling
•    Low power IC or embedded system design
•    Secure SOC hardware or firmware development
•    Functional safety requirements
•    Communication protocols – CAN, LIN, USB, SPI, etc.
•    Analog/digital IC or mixed-signal systems design
•    Digital signal processing/control
•    Power simulation tools SIMPLIS/Simetrix, PSIM, etc.
•    Digital simulation tools Matlab Simulink, Verilog HDL, System Verilog, etc.
 
Additional Preferred Qualifications

•    Strong interpersonal skills, oral communications and influencing skills
•    Excellent written and presentation skills
•    Able to assume responsibility and proactively address problems

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